Samsung 10 nm SRAM 10 core chip will appear in ISSCC
- Author:Gemini
- Source:www.ramjoinwin.com
- Release Date:2015-12-14
Annual international conference on solid state circuit (ISSCC) will be held in February, almost all important chip research and development to the public for the first time, allowing the industry to catch a glimpse of the upcoming new technology and its development trend.Samsung (Samsung) will be in 2016 published the latest ISSCC 10 nm process technology, MediaTek (MediaTek) will show the three Cluster (Tri - Cluster) architecture with ten core innovation action SoC.In addition, fingerprint recognition, vision processor with 3 d chip stack and higher density memory technology will also display the latest development in the results.
Samsung will provide more details of DRAM and flash memory chips, one of the most important is a used 10 nm FinFET 128 mbit SRAM embedded technology process.According to the ISSCC organizers said the component has "so far the smallest SRAM cell," high density (HD) chip size is about 0.040 microns, and high current (HD) version of the chip size is about 0.049 microns.The design of support "integrated auxiliary circuit, can improve the HD respectively with HC unit, the minimum operating voltage (Vmin) to 130 mv and 80 mv.
The Linley Group microprocessor analyst David Kanter says, "compared with 14 nm samsung 0.064 mu m2 SRAM, 10 nm chip version of reduced 0.63 times, of course, is not ideal, but compared to 0.049 mu of m2 Intel (Intel) 14 nm SRAM, samsung memory unit is reduced 0.82 times, this is not between 20 nm and 14 nm samsung miniature metal regular results."But Kanter is expected to Intel's 10 nm SRAM size should be smaller.
Taiwan semiconductor manufacturing co (TSMC) was announced 10 nm process earlier this year.According to reports, TSMC is Apple (Apple) used in the next-generation iPhone processor SoC overweight process input.Samsung and TSMC currently are Apple iPhone SoC's main source of supply.
The world's biggest chipmaker Intel has delayed release 10 nm chip plan, the reason is that lead to rising costs and complexity required to achieve this goal of next generation lithography technology continues to delay.Although some may be due to 10 nm chips must use triple design key stratum and compress the profit, but samsung and TSMC was no choice, if they want to win orders from Apple - this could be the biggest of a deal.
ram memory 800 2gb ddr2In addition to samsung SRAM, TSMC will also be revealed in the ISSCC 16 nm FinFET process in more detail.Intel may reveal in the process of developing the next generation of chips challenges such as the increasing complexity and cost.Intel's manufacturing department general manager William m. Holt said: "because we have been faced with the challenges brought about by the miniature, with people more and more concerns to Moore's Law (Moore 's Law) in towards the vitality of the future."